You now have a pc board drill that’s low enough in torque not to develop a mind of its own as to where the holes should be (unlike Dremel etc). It’s thus less likely to skitter away and snap bits. If the bit jams, just counter-rotate to unscrew it from the hole, clean the debris from the hole-thus-far, then come at the hole again, slower, letting the drill do the muscle-work without you leaning into it. That applies whether you’re drilling out a just-etched board or making some kluge space in one corner of an existing board (use a clamped-on piece of perfboard as a guide if you want 0.1″ centers). Oh, and it’s likely lighter than the Dremel, too, which matters in not having muscle fatigue cause you to mess up drilling a board full of holes.

I’ve been doing this for decades, now, and, after using Dremel, Fordham, Iso-Tip drill extension and various other drill-type tools, I keep coming back to my Bruning. It just *thought* it could retire when I went from the drafting table to OrCAD.

False bus states aren’t a problem with a 65C02, but are with the NMOS 6502 and in some cases, can cause I/O silicon to misbehave. The 65C816 generates false bus states during some instructions but WDC thoughtfully provides the VDA and VPA outputs on that MPU to indicate when the address bus is valid.

Using Ø2 to qualify address decoding is actually incorrect for the 65xx family. In your particular case, you can get away with it because you aren’t using any 65xx peripheral devices (e.g., 6522 or 6551). If you were, you’d be dismayed to discover the peripheral devices to be unresponsive. The chip selects for those devices must be valid before the rise of Ø2.

Where you should be using Ø2 is to qualify read/write ops. Most SRAMs have separate “output enable” (/OE) and “write enable” (/WE) inputs, as well as a “chip select” (/CS) input. /CS should be asserted as soon as an appropriate address appears on A0-A15 (generally about midway through Ø2 low). /OE or /WE, depending on whether it’s a read or write operation, should be asserted when Ø2 goes high. That way, false bus states that occur during intermediate stages of instruction processing can’t randomly scribble in your RAM. Simple gates can take care of the Ø2 qualification logic.