Category: Hacks

PCB Etching Analysis

Pushing the boundaries to see what blows up.

 

I can’t ever leave things well enough alone, so while working on Veronica’s input systemI decided to really push my PCB etching. I wanted to see if I can find the boundaries of what the process is capable of, and perhaps identify the weak points.

One of the key elements of the process is that I print the UV exposure mask on to two transparency sheets, and double them up. I’ve been assuming that one layer of printer toner probably wasn’t enough to completely block UV. Ultraviolet light is sneaky stuff, capable of going right through blue tape, for example. However, doubling up the masks introduces a tricky element to the process- alignment. The two masks need to be lined up very very precisely, and this is difficult to do perfectly. So, it would be nice if I could skip this step. Can I?

Nope.

..

Here’s a board etched with a single layer of toner. All that pitting is where the photoresist on the board wasn’t sufficiently protected from the UV light, and thus got attacked by the etchant. Still, I was curious if this would work anyway, so as you can see, I soldered up the board, repaired the worst of the damage, and tested it. No good. A close look shows that it would be easy for enough of those pits to clump up and break a trace completely. This board is not salvageable.

 

..

Here’s the same area of the same board, with two layers of printer toner. Quite a difference, as you can see. So, it’s a no-brainer that the two layers are necessary.

 

With that established, I was curious about how small of a feature I might be able to etch. I tightened up my clearances in Eagle to see what would happen.

Here’s a little analysis of the result:

...

Here’s a couple of traces at 15x magnification. The traces are 16 mils wide (according to Eagle). I calibrated Photoshop against this, and used it to measure some other features. At this scale, we’re at ~9 pixels per mil, which makes the gap between the traces and the fill plane about 45 pixels, or 5 mils.

 

If this is repeatable, 5 mils (0.005″ or 0.127mm) is a pretty darned impressive minimum feature size for a homemade PCB. Repeatability is a big question. This demonstrates the power of a photographic process, however. You just can’t be the precision that is possible (at least in theory).

All is not perfect, however.

..

Here’s another area of the board. What has happened here is that the two transparency masks were a few mils out of alignment. When the gap is only 5 mils wide, that means alignment needs to be correct to within ±2.5 mils, and that’s very difficult to do by hand and eye. On top of that, the transparencies have some flex in them, and it’s tough to keep them perfectly still while clamping the PCB in the UV exposure jig.

 

As you can see from that shot, pushing the tolerances too much can lead to bridging. This corner of the board has a trace and a nearby pad that are badly bridged. This is really evident though, so it’s fixable. The real danger is shown on the second pad from the top. See that nearly-microscopic bridge on the top left corner? THAT is the kind of error that can easily go unnoticed in a visual inspection of the board, and can drive you CRAZY trying to debug it. These types of errors are easily corrected with a sharp knife, but why make work for yourself? Debugging a new circuit becomes complex indeed if you can’t trust the PCB.

So, the moral of the story is that you need some margin for error to prevent these kinds of things, even if the theoretical best performance of the process is quite a bit higher. A chain is only as strong as its weakest link, and a process is only as strong as its weakest step. In this case, the mask alignment is my weakest step by far.

Having a fill-plane isolation of only 5 mils is very tempting, because it really simplifies routing on a single-layer board. It means the ground plane reaches everything with few or no jumpers required. However, it’s probably not worth the aggravation caused by errors like that one on the second pad.

Here’s further evidence of both the alignment difficulty, and the theoretical power of this process:

..

I put some text on the board somewhere (usually my URL), to help prevent front-to-back inversion errors when placing the masks on the board. Look at the ‘s’ in “hacks” above. You can actually see the two ‘s’es from the two layers, slightly misaligned. The result is a globular ‘s’. The small size of a feature on that ‘s’ is really remarkable, though, if the alignment had been better. We’re looking at somewhere around 2 mils there.

To improve mask alignment to the point where a 5 mil clearance would be repeatable requires a change to how the masks are aligned. Perhaps some sort of alignment jig that could register against features in the artwork, or some other kind of printing process that could achieve UV-opaqueness in a single pass. Food for thought.

There’s another interesting thing going on at this scale:

..

Here’s a well-aligned area of the board, shown at 15x magnification.

Look closely at the traces (the thinnest horizontal copper features in the image). Notice how the edges are slightly wavy? Those are actually the pixels in the printed mask. The mask is imported from Eagle into GIMP, then printed at 600dpi. If I continued to improve the precision of this process, at some point the pixelation in the mask at this scale would start to become an issue. Those bumps are probably in the 0.25 mil range, so I doubt that will be a problem any time soon. Still, it’s neat to see the fingerprints of the process in the end result.

There are other reasons to be careful about pushing the process too much. Sometimes, even with doubling up the transparencies, an error sneaks through.

..

See that empty speck right in the middle of the image? For some reason, that empty speck ended up in both layers of the mask. Perhaps it was a glitch in the printing, or it was in the original artwork for some reason. It’s harmless here, but that spec is large enough to potentially break a 10mil trace if it landed in the wrong spot. That’s another reason not to push this process too far. Next time, I may not get so lucky with Mr. Speck here.

 

Of course, beyond all that, there is simple human error as well. I found this lovely piece of work in a corner of the board:

 

..

Note the two traces happily stomping their way across the nearby pads. I can’t blame any fancy process for this one.

 

I neglected to run the ERC or DRC checks in Eagle on this board. Either of them would have caught that, since it’s both a clearance violation and an electrical cross-connection. Whoops! Luckily I caught it in my usual visual inspection of the etch. It wasn’t a big deal to cut the offending traces and replace them with jumpers.

So, that was an educational little tour of a board. The weakest point in my process is certainly the alignment of the two transparency masks. However, while solving that problem would allow me to tighten my clearances and shrink my traces, I’ve learned that other possible errors (Mr. Speck to the white courtesy phone, please) make that a dangerous proposition in any case. I think I’ll leave things well enough alone for now.

 

 

 

Hacks